**Content**

# Setting up Analyses

## What are Analyses?

An analysis is simply an instruction to the simulator telling it what type of simulation to carry out on the spice netlist.

There are several different types of analysis that can be carried out when a simulation is run.

EasyEDA directly supports a subset of the spice analyses that are available in LTspice. These analyses are accessed via **CTRL+J** and are described below.

### SPICE Analyses available via **CTRL+J**

**CTRL+J** opens the **Run your simulation** dialogue box.

The **Run your simulation** dialogue box offers the following SPICE analyses.

1) DC op pnt

2) DC Transfer

3) DC Sweep

4) AC Analysis

5) Transient

For more information about what each analysis does, please scroll down to the relevant sections.

### SPICE Analyses and Control Statement Syntax

The SPICE analyses listed above can also be entered directly into a text box in a schematic.

Several analysis statements can be entered in a single schematic but one and only one can be made active for any one simulation run. To make an analysis statement active, do:

Text Attributes > Text type > spice

To make an analysis statement inactive, do:

Text Attributes > Text type > comment

When a SPICE analysis is placed directly in the schematic and made active, it can then be run simply by doing:

F8

(was CTRL+R)

By entering a SPICE analysis directly in the schematic it is then possible to access some of the advanced options for some of the analyses.

A link to more information for each analysis is given in the relevant sections below.

#### 1) .OP: Perform an Operating Point Analysis

General form:

.op

Example:

.op

Causes LTspice to perform an operating-point analysis to determine the quiescent DC Operating point of the circuit with inductors shorted and capacitors opened. The results of this analysis are used to calculate values for the linearised, small-signal models of nonlinear devices.

More information:

http://ltwiki.org/LTspiceHelpXVII/LTspiceHelp/html/DotOp.htm

#### 2) .TF: Perform a DC Transfer Function Analysis

The dc transfer function analysis portion of SPICE computes the following small signal characteristics:

- the ratio of output variable to input variable (gain or transfer gain)
- the resistance with respect to the input source
- the resistance with respect to the output terminals

The TF statement can be used to find the Thevenin small signal equivalent resistance. (The Thevenin voltage is given by the node voltage at the open circuit terminal, as a result of the OP statement).

General form:

.tf OUTvar inSRC

Examples:

.tf V(5, 3) VIN

.tf I(VLOAD) VIN

The .TF command defines the small-signal output and input for the DC small-signal analysis. OUTvar is the small-signal output variable and inSRC is the small-signal input source. If this line is included, SPICE computes the DC small-signal value of the transfer function (output/input), input resistance and the output resistance.

More information:

http://ltwiki.org/LTspiceHelpXVII/LTspiceHelp/html/DotTf.htm

#### 3) .DC: Perform a DC-Sweep Analysis

During a DC-sweep analysis SPICE steps the value of a specified independent voltage or current source over the user-specified range and performs an operating point analysis at each value. This permits the evaluation of the DC transfer function, and also provides a mechanism for plotting the characteristic curves of devices and models.

General form:

.dc Source-Name Vstart Vstop Vincr >[ Source2 Vstart2 Vstop2 Vincr2 ]

Examples:

.dc vin 0.25 5.0 0.25

.dc vin 0 10 .5 vgs 0 5 1

.dc vce 0 10 .25 ib 0 10u 1u

.dc R1 0 1k 100

.dc TEMP 0 100 1

The parameters define the dc transfer-curve source and sweep limits. Source-Name is the name of an independent voltage or current source, a resistor or the circuit temperature. Vstart, Vstop, and Vincr are the starting, final, and incrementing values respectively. The first example causes the value of the voltage source vin to be swept from 0.25 volts to 5.0 volts in increments of 0.25 volts. A second source (Source2) may optionally be specified with associated sweep parameters. In this case, the first source is swept over it’s range for each value of the second source.

The following simulation illustrate a DC Sweep of a single voltage source:

#### 4) .AC: Perform a Small-Signal AC (frequency domain) Analysis

The ac small-signal portion of SPICE computes the ac output variables as a function of frequency. The program first computes the dc operating point of the circuit and determines linearized, small-signal models for all of the nonlinear devices in the circuit. The resultant linear circuit is then analyzed over a user-specified range of frequencies. The desired output of an ac small-signal analysis is usually a transfer function (voltage gain, transimpedance, etc). If the circuit has only one ac input, it is convenient to set that input to unity and zero phase, so that output variables have the same value as the transfer function of the output variable with respect to the input.

General form:

.ac ( DEC | OCT | LIN ) N Fstart Fstop

Examples:

.ac dec 10 1 10K

.ac dec 10 1k 100Meg

.ac lin 100 1 100Hz

Use:

‘dec’ for decade variation, in which case N is the number of points per decade;

‘oct’ for octave variation, in which case N is the number of points per octave;

‘lin’ for linear variation, in which case N is the total number of points.

*Please note however that due to limitations in the WaveForm tool, only log axes are currently implemented in EasyEDA so the ‘oct’ and ‘lint’ sweep options are of limited use.*

Fstart is the starting frequency, and Fstop is the final frequency.

More information:

http://ltwiki.org/LTspiceHelpXVII/LTspiceHelp/html/AC_analysis.htm

*Please note however that due to limitations in the WaveForm tool, the syntax “.ac list “ with a single analysis frequency is not implemented in EasyEDA.*

#### 5) .TRAN: Perform a Transient (time domain) Analysis

The transient analysis portion of LTspice computes the transient output variables as a function of time over a user-specified time interval. The initial conditions are automatically determined by a dc analysis. All sources which are not time dependent (for example, power supplies) are set to their dc value.

General form:

.TRAN[Tstart [dTmax]] [modifiers] .TRAN[modifiers]

The first form is the traditional .tran SPICE command. Tstep is the plotting increment for the waveforms but is also used as an initial step-size guess. LTspice uses waveform compression, so this parameter is of little value and can be omitted or set to zero. Tstop is the duration of the simulation. Transient analyses always start at time equal to zero. If Tstart is omitted, it is assumed to be zero. However, if Tstart is specified, the waveform data between zero and Tstart is not saved. This is a means of managing the size of waveform files by allowing startup transients to be ignored.

In the interval prior to Tstart, the circuit is analyzed (to reach a steady state), but no outputs are stored. In the interval (Tstop-Tstart), the circuit is analyzed and outputs are stored.

The final parameter dTmax, is the maximum time step to take while integrating the circuit equations. If Tstart or dTmax is specified, Tstep must be specified but is usually set to zero.

Note that in EasyEDA, dTmax is limited as: dTmax=(Tstop-Tstart)/1000. This is a limitation of EasyEDA to limit server usage. This is not an inherent limit in native LTspice run on a local machine.

Several modifiers can be added to the end of the .tran statement. The most useful is probably:

startup: Solve the initial operating point with independent voltage and current sources turned off. Then start the transient analysis and turn these sources on in the first 20 us of the simulation.

This simulates running a circuit from when it is first switched on.

UIC:

Note that the ‘uic’ option must be used with caution.

Normally, a DC operating point analysis is performed before starting the transient analysis. The results of this DC operating point analysis provide the initial conditions for the circuit at time t=0.

The ‘uic’ spice directive suppresses this initialization.

The initial conditions of some circuit elements can be specified on an instance-per-instance basis. For example: transistors can be specified to be in an OFF initial state; switches can be specified to be in an ON or an OFF initial state; the .IC spice directive allows the voltages on nets and the currents in inductors at t=0 to be specified.

If the ‘uic’ option is added to a tran spice directive then all specified initial conditions are used. It is important to realise however that if the ‘uic’ directive is used without explicitly stating the initial conditions then, because the DC operating point analysis is omitted, default values are assumed. This can cause problems in some simulations because the default values can lead to non-physical initial conditions around a circuit. For example, consider an ideal voltage source connected in parallel to an ideal capacitor. Unless it is specified otherwise, the default initial value of the voltage source is taken as zero. Therefore, the voltage across the capacitor is also zero at t=0. Then, in the first time step, the voltage source is set to the operating output voltage so an infinite current is drawn from it to charge the capacitor up to this operating voltage. The simulator cannot find a short enough time step to make this current finite, and a “time step too small convergence fail” message is issued.

For information on these and other modifiers that can be applied to the .tran directive, please refer to:

http://ltwiki.org/LTspiceHelpXVII/LTspiceHelp/html/DotTranModifiers.htm

Examples:

.tran 1m

.tran 1m startup

.tran 0 1000ns 500ns 10ns

.tran 10ns 1us 0us 20ns uic

#### .IC: Set Initial Conditions

General form:

.IC [V()= ] [I( )= ]

Example:

.IC V(in)=2 V(out)=5 V(vc)=1.8 I(L1)=300m

The IC line is for setting initial transient conditions. It has two different interpretations depending on whether the UIC parameter is specified on the .TRAN control line. One should not confuse this line with the .NODESET line. The .NODESET line is only to help DC convergence, and does not affect final bias solution (except for multi-stable circuits). The two interpretations of this line are as follows:

1) When the uic parameter is specified on the .tran line, then the node voltages specified on the .ic control line are used to compute the capacitor, diode, BJT, JFET, and MOSFET initial conditions. This is equivalent to specifying the `ic=...`

parameter on each device line, but is much more convenient. The `ic=...`

parameter can still be specified and takes precedence over the .ic values. Since no dc bias (initial transient) solution is computed before the transient analysis, one should take care to specify all dc source voltages on the .ic control line if they are to be used to compute device initial conditions.

2) When the uic parameter is not specified on the .tran control line, the dc bias (initial transient) solution is computed before the transient analysis. In this case, the node voltages specified on the .ic control line is forced to the desired initial values during the bias solution. During transient analysis, the constraint on these node voltages is removed. This is the preferred method since it allows LTspice to compute a consistent dc solution.

Note that if the ‘uic’ option is not used then any .IC directives included in the simulation are used anyway.