An analysis is simply the instruction to the simulator telling it what type of simulation to carry out on the spice netlist.
There are several different types of analysis that can be carried out when a simulation is run.
EasyEDA supports a subset of the spice analyses that are available in ngspice. The supported analyses supported by the Simulate… dialogue box (accessed via Tools > Simulation > Simulate this Sheet or Simulate this Project options or directly via CTRL+R) are described below.
Selecting Tools > Simulation opens the Simulation options menu.
- Simulate this Schematic…
This is to run a simulation on a single schematic sheet.
- Simulate this Project…
This is to run a simulation on all the schematic sheets in a project.
Note that the component prefixes (reference designators) must be unique across all schematic sheets: i.e. there must be no duplicate reference designators.
Attempting to run a simulation on any sheet or collection of sheets containing duplicate reference designators will generate the Prefix conflict error’.
Tools > Simulation > Simulate this Schematic… / Simulate this Project…
the following SPICE analyses can be run from a simple dialogue box. For more information about what they do, please scroll down to the relevant sections.
1) DC op pnt
2) DC Transfer
3) DC Sweep
4) AC Analysis
The following SPICE analyses can also be entered directly into a text box in a schematic.
Several analysis statements can be entered in a single schematic but one and only one can be made active for any one simulation run. To make an analysis statement active, do:
Text Attributes > Text type > spice
To make an analysis statement inactive, do:
Text Attributes > Text type > comment
They can then be run simply by doing:
Several analysis statements can be entered in a single schematic but one and only one can be made active for any one simulation run.
Causes SPICE to perform an operating-point analysis to determine the the quiescent state of the circuit with inductors shorted and capacitors opened. The results of this analysis are used to calculate values for the the linearised, small-signal models of nonlinear devices.
The dc transfer function analysis portion of SPICE computes the following small signal characteristics:
- the ratio of output variable to input variable (gain or transfer gain)
- the resistance with respect to the input source
- the resistance with respect to the output terminals
The TF statement can be used to find the Thevenin small signal equivalent resistance. (The Thevenin voltage is given by the node voltage at the open circuit terminal, as a result of the OP statement).
tf OUTvar inSRC
tf V(5, 3) VIN
tf I(VLOAD) VIN
The TF command defines the small-signal output and input for the DC small-signal analysis. OUTvar is the small-signal output variable and inSRC is the small-signal input source. If this line is included, SPICE computes the DC small-signal value of the transfer function (output/input), input resistance and the output resistance.
During a DC-sweep analysis SPICE steps the value of a specified independent voltage or current source over the user-specified range and performs an operating point analysis at each value. This permits the evaluation of the DC transfer function, and also provides a mechanism for plotting the characteristic curves of devices and models.
dc Source-Name Vstart Vstop Vincr >[ Source2 Vstart2 Vstop2 Vincr2 ]
dc vin 0.25 5.0 0.25
dc vin 0 10 .5 vgs 0 5 1
dc vce 0 10 .25 ib 0 10u 1u
dc R1 0 1k 100
dc TEMP 0 100 1
The parameters define the dc transfer-curve source and sweep limits. Source-Name is the name of an independent voltage or current source, a resistor or the circuit temperature. Vstart, Vstop, and Vincr are the starting, final, and incrementing values respectively. The first example causes the value of the voltage source vin to be swept from 0.25 volts to 5.0 volts in increments of 0.25 volts. A second source (Source2) may optionally be specified with associated sweep parameters. In this case, the first source is swept over it’s range for each value of the second source.
It is worth highlighting that the DC Sweep Spice Analysis allows not just voltage and current sources to be swept but also temperature and resistances because Source-Name can also refer to a resistor in the circuit or to the keyword TEMP meaning temperature in degrees Celcius.
The following simulations illustrate sweeping:
- a voltage source;
- a resistor value;
- the ambient temperature applied to every component in the simulation:
The ac small-signal portion of SPICE computes the ac output variables as a function of frequency. The program first computes the dc operating point of the circuit and determines linearized, small-signal models for all of the nonlinear devices in the circuit. The resultant linear circuit is then analyzed over a user-specified range of frequencies. The desired output of an ac small-signal analysis is usually a transfer function (voltage gain, transimpedance, etc). If the circuit has only one ac input, it is convenient to set that input to unity and zero phase, so that output variables have the same value as the transfer function of the output variable with respect to the input.
ac ( DEC | OCT | LIN ) N Fstart Fstop
ac dec 10 1 10K
ac dec 10 1k 100Meg
ac lin 100 1 100Hz
‘dec’ for decade variation, in which case N is the number of points per decade;
‘oct’ for octave variation, in which case N is the number of points per octave;
‘lin’ for linear variation, in which case N is the total number of points.
Fstart is the starting frequency, and Fstop is the final frequency.
The transient analysis portion of SPICE computes the transient output variables as a function of time over a user-specified time interval. The initial conditions are automatically determined by a dc analysis. All sources which are not time dependent (for example, power supplies) are set to their dc value.
tran Tstep Tstop >[ Tstart >[ Tmax ] ] >[ uic ]
tran 1ns 100ns 0ns 2ns
tran 1ns 1000ns 500ns 10ns
tran 10ns 1us 0us 20ns uic
Tstep is the suggested computing increment.
Tstop is the final time.
Tstart is the initial time.
If Tstart is omitted, it is assumed to be zero. The transient analysis always begins at time zero.
In the interval , the circuit is analyzed (to reach a steady state), but no outputs are stored. In the interval , the circuit is analyzed and outputs are stored. Tmax is the maximum step-size that SPICE uses; try Tmax=(Tstop-Tstart)/50.0 to start with.
The optional keyword ‘uic’ (use initial conditions) indicates that the user does not want ngspice to solve for the quiescent operating point before beginning the transient analysis. If this keyword is specified, ngspice uses the values specified using IC=… on the various elements as the initial transient condition and proceeds with the analysis. If the .ic control line has been specified, then the node voltages on the .ic line are used to compute the initial conditions for the devices. IC=… will take precedence over the values given in the .ic control line. If neither IC=… nor the .ic control line is given for a specific node, node voltage zero is assumed.
Please see the description below of the .ic control line for its interpretation when uic is not specified.
.IC V(11)=5 V(4)=-5 V(2)=2.2
The IC line is for setting initial transient conditions. It has two different interpretations depending on whether the UIC parameter is specified on the .TRAN control line. One should not confuse this line with the .NODESET line. The .NODESET line is only to help DC convergence, and does not affect final bias solution (except for multi-stable circuits). The two interpretations of this line are as follows:
1) When the uic parameter is specified on the .tran line, then the node voltages specified on the .ic control line are used to compute the capacitor, diode, BJT, JFET, and MOSFET initial conditions. This is equivalent to specifying the
ic=... parameter on each device line, but is much more convenient. The
ic=... parameter can still be specified and takes precedence over the .ic values. Since no dc bias (initial transient) solution is computed before the transient analysis, one should take care to specify all dc source voltages on the .ic control line if they are to be used to compute device initial conditions.
2) When the uic parameter is not specified on the .tran control line, the dc bias (initial transient) solution is computed before the transient analysis. In this case, the node voltages specified on the .ic control line is forced to the desired initial values during the bias solution. During transient analysis, the constraint on these node voltages is removed. This is the preferred method since it allows ngspice to compute a consistent dc solution.
Note that the ‘uic’ option must be used with caution.
Normally, a DC operating point analysis is performed before starting the transient analysis. The results of this DC operating point analysis provide the initial conditions for the circuit at time t=0.
The ‘uic’ spice directive suppresses this initialization.
The initial conditions of some circuit elements can be specified on an instance-per-instance basis. For example: transistors can be specified to be in an OFF initial state; switches can be specified to be in an ON or an OFF initial state; the .IC spice directive allows the voltages on nets at t=0 to be specified.
If the ‘uic’ option is added to a tran spice directive then all specified initial conditions are used.
It is important to realise however that if the ‘uic’ directive is used without explicitly stating the initial conditions then, because the DC operating point analysis is omitted, default values are assumed. This can cause problems in some simulations because the default values can lead to non-physical initial conditions around a circuit. For example, consider an ideal voltage source connected in parallel to an ideal capacitor. Unless it is specified otherwise, the default initial value of the voltage source is taken as zero. Therefore, the voltage across the capacitor is also zero at t=0. Then, in the first time step, the voltage source is set to the operating output voltage so an infinite current is drawn from it to charge the capacitor up to this operating voltage. The simulator cannot find a short enough time step to make this current finite, and a “time step too small convergence fail” message is issued.
Note that if the ‘uic’ option is not used then any .IC directives included in the simulation are used anyway.